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2011
IEEE

Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach

7 years 10 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case performance are hard to be modeled for the WCET analysis. In this paper we present Patmos, a processor optimized for low WCET bounds rather than high average case performance. Patmos is a dual-issue, statically scheduled RISC processor. The instruction cache is organized as a method cache and the data cache is organized as a split cache in order to simplify the cache WCET analysis. To fill the dual-issue pipeline with enough useful instructions, Patmos relies on a customized compiler. The compiler also plays a central role in optimizing the application for the WCET instead of average case performance. 1998 ACM Subject Classification C.3 Special-Purpose and Application-Based Systems – Real-time and embedded systems
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf
Added 20 Aug 2011
Updated 20 Aug 2011
Type Journal
Year 2011
Where DATE
Authors Martin Schoeberl, Pascal Schleuniger, Wolfgang Puffitsch, Florian Brandner, Christian W. Probst
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