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FCCM
2006
IEEE

A Type Architecture for Hybrid Micro-Parallel Computers

9 years 7 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequential and spatial code in a single application, programming them, and particularly their spatial fabrics remains challenging. The difficulty arises in part from the lack of an agreed upon computational model and family of programming languages. In addition, moving algorithms into hardware is an arcane art far removed from the experience of most programmers. To address this challenge, we present a new type architecture, an abstract model analogous to the von Neumann machine for sequential computers, that can serve as common ground for algorithm designers, language designers, and hardware architects. We show that many parallel architectures, including platform FPGAs, are implementations of this type architecture. Using examples from a variety of application domains, we show how algorithms can be analyzed to estim...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
Added 11 Jun 2010
Updated 11 Jun 2010
Type Conference
Year 2006
Where FCCM
Authors Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
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