Unroll-and-Jam Using Uniformly Generated Sets

Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory have increased. Unfortunately, memory systems have not kept pace. Even hierarchical cache structures are ineffective if programs do not exhibit cache locality. Because of this compilers need to be concerned not only with finding ILP to utilize machine resources effectively, but also with ensuring that the resulting code has a high degree of cache locality. One compiler transformation that is essential for a compiler to meet the above objectives is unroll-and-jam, or outer-loop unrolling. Previous work has either used a dependence based model [1] to compute unroll amounts, significantly increasing the size of the dependence graph, or has applied brute force techniques [2]. In this paper, we present an algorithm that uses linearalgebra-based techniques to compute unroll amounts that save 84% of the dependence-g...

• Type: Conference
• Year: 1997
• Where: MICRO
• Authors: Steve Carr, Yiping Guan
• Keywords: Cache Locality, Hardware, Hierarchical Cache Structures, MICRO 1997, Unroll Amounts