34 search results - page 7 / 7 » 3D floorplanning with thermal vias |
3DIC
2009
IEEE
14 years 4 days ago
2009
IEEE
Abstract—In 3DICs heat dissipating devices are stacked directly on top of each other leading to a higher heat density than in a comparable 2D chip. 3D integration also moves the ...
DAC
2006
ACM
13 years 7 months ago
2006
ACM
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
Three-dimensional integrated circuits (3DICs) have the potential to reduce interconnect lengths and improve digital system performance. However, heat removal is more difficult in ...
DAC
2010
ACM
13 years 9 months ago
2010
ACM
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...