90 search results - page 2 / 18 » A Basis for Formal Robustness Checking |
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract—Continuously shrinking feature sizes cause an increasing vulnerability of digital circuits. Manufacturing failures and transient faults may tamper the functionality. Aut...
ICSE
1994
IEEE-ACM
13 years 9 months ago
1994
IEEE-ACM
As software systems become more complex the overall system structure { or software architecture { becomes a central design problem. An important step towards an engineering discip...
POPL
2009
ACM
14 years 6 months ago
2009
ACM
We present a unified approach to type checking and property checking for low-level code. Type checking for low-level code is challenging because type safety often depends on compl...
TCAD
2002
13 years 5 months ago
2002
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
AMAST
2004
Springer
13 years 10 months ago
2004
Springer
JavaFAN uses a Maude rewriting logic specification of the JVM semantics as the basis of a software analysis tool with competitive performance. It supports formal analysis of concu...