213 search results - page 43 / 43 » A Case for Visualization-Integrated System-Level Design Spac... |
ISPASS
2007
IEEE
13 years 11 months ago
2007
IEEE
Architectures are usually compared by running the same workload on each architecture and comparing performance. When a single compiled binary of a program is executed on many diff...
ICCAD
1995
IEEE
13 years 9 months ago
1995
IEEE
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
USENIX
2007
13 years 7 months ago
2007
Virtual machine (VM) memory allocation and VM consolidation can benefit from the prediction of VM page miss rate at each candidate memory size. Such prediction is challenging for...