21 search results - page 1 / 5 » A Compact Rijndael Hardware Architecture with S-Box Optimiza... |
ASIACRYPT
2001
Springer
13 years 9 months ago
2001
Springer
Compact and high-speed hardware architectures and logic optimization methods for the AES algorithm Rijndael are described. Encryption and decryption data paths are combined and all...
CTRSA
2005
Springer
13 years 10 months ago
2005
Springer
This work proposes a compact implementation of the AES S-box using composite field arithmetic in GF(((22 ) 2 ) 2 ). It describes a systematic exploration of different choices for...
TC
2002
13 years 4 months ago
2002
Two architectures and VLSI implementations of the AES Proposal, Rijndael, are presented in this paper. These alternative architectures are operated both for encryption and decrypti...
CHES
2004
Springer
13 years 10 months ago
2004
Springer
Since their publication in 1998, power analysis attacks have attracted significant attention within the cryptographic community. So far, they have been successfully applied to di...
ISSA
2004
13 years 6 months ago
2004
This paper describes a high data rate 8-bit Crypto Processor based on Advanced Encryption Standard (Rijndael algorithm). Though the algorithm requires 32-bit wide data path but ou...