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DSD
2003
IEEE
97views Hardware» more  DSD 2003»
13 years 10 months ago
A Quadruple Precision and Dual Double Precision Floating-Point Multiplier
Double precision floating-point arithmetic is inadequate for many scientific computations. This paper presents the design of a quadruple precision floating-point multiplier tha...
Ahmet Akkas, Michael J. Schulte
EUROGP
2009
Springer
105views Optimization» more  EUROGP 2009»
13 years 10 months ago
Quantum Circuit Synthesis with Adaptive Parameters Control
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mir...
ARITH
1999
IEEE
13 years 9 months ago
Multiplications of Floating Point Expansions
In modern computers, the floating point unit is the part of the processor delivering the highest computing power and getting most attention from the design team. Performance of an...
Marc Daumas
FCCM
1997
IEEE
118views VLSI» more  FCCM 1997»
13 years 9 months ago
Computing kernels implemented with a wormhole RTR CCM
The Wormhole Run-Time Reconfiguration (RTR) computing paradigm is a method for creating high performance computational pipelines. The scalability, distributed control and data pow...
Ray Bittner, Peter M. Athanas
INFOCOM
2000
IEEE
13 years 9 months ago
Comparisons of Packet Scheduling Algorithms for Fair Service Among Connections on the Internet
Abstract—We investigate the performance of TCP under three representatives of packet scheduling algorithms at the router. Our main focus is to investigate how fair service can be...
Go Hasegawa, Takahiro Matsuo, Masayuki Murata, Hid...