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» A Dynamically Adaptable Hardware Transactional Memory
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MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
13 years 2 months ago
STEM: Spatiotemporal Management of Capacity for Intra-core Last Level Caches
Efficient management of last level caches (LLCs) plays an important role in bridging the performance gap between processor cores and main memory. This paper is motivated by two key...
Dongyuan Zhan, Hong Jiang, Sharad C. Seth
NABIC
2010
12 years 11 months ago
Regional ACO-based routing for load-balancing in NoC systems
Abstract--Ant Colony Optimization (ACO) is a problemsolving technique that was inspired by the related research on the behavior of real-world ant colony. In the domain of Network-o...
Hsien-Kai Hsin, En-Jui Chang, Chih-Hao Chao, An-Ye...
ISCA
2005
IEEE
117views Hardware» more  ISCA 2005»
13 years 10 months ago
Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization
The load-store unit is a performance critical component of a dynamically-scheduled processor. It is also a complex and non-scalable component. Several recently proposed techniques...
Amir Roth
TVCG
2010
153views more  TVCG 2010»
13 years 3 months ago
Parallel View-Dependent Level-of-Detail Control
—We present a scheme for view-dependent level-of-detail control that is implemented entirely on programmable graphics hardware. Our scheme selectively refines and coarsens an ar...
Liang Hu, Pedro V. Sander, Hugues Hoppe
JSAC
2006
165views more  JSAC 2006»
13 years 4 months ago
ALPi: A DDoS Defense System for High-Speed Networks
Distributed denial-of-service (DDoS) attacks pose a significant threat to the Internet. Most solutions proposed to-date face scalability problems as the size and speed of the netwo...
P. E. Ayres, H. Sun, H. Jonathan Chao, Wing Cheong...