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IAJIT
2010
84views more  IAJIT 2010»
13 years 9 months ago
A Test Procedure for Boundary Scan Circuitry in PLDs and FPGAs
: A test procedure for testing mainly the boundary scan cells, and testing partially the test access port controller in programmable logic devices, and field programmable gate arra...
Bashar Al-Khalifa
FPL
2010
Springer
210views Hardware» more  FPL 2010»
13 years 8 months ago
A Compact Transactional Memory Multiprocessor System on FPGA
In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPGA) with support for software transactional memory. The system is composed only b...
Matteo Pusceddu, Simone Ceccolini, Gianluca Palerm...
ERSA
2009
387views Hardware» more  ERSA 2009»
13 years 8 months ago
Implementation of the Gauss-Newton Algorithm for Non-linear Least-mean-squares Fitting in FPGA Devices
Abstract-- The paper presents the implementation of nonlinear least-squares regression in a Field Programmable Gate Array (FPGA) device. The implemented algorithm is very performan...
Andrea Abba, Antonio Manenti, Andrea Suardi, Angel...
FPGA
2008
ACM
168views FPGA» more  FPGA 2008»
13 years 12 months ago
Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an ...
Alessandro Cevrero, Panagiotis Athanasopoulos, Had...
AHS
2006
IEEE
130views Hardware» more  AHS 2006»
14 years 4 months ago
Self-Adaptive System Based on Field Programmable Gate Array for Extreme Temperature Electronics
Space missions often require radiation and extreme-temperature hardened electronics to survive the harsh environments beyond earth’s atmosphere. Traditional approaches to preser...
Didier Keymeulen, Ricardo Salem Zebulum, Rajeshuni...