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ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
13 years 11 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
WADS
2001
Springer
182views Algorithms» more  WADS 2001»
13 years 10 months ago
On the Complexity of Scheduling Conditional Real-Time Code
Abstract. Many real-time embedded systems involve a collection of independently executing event-driven code blocks, having hard real-time constraints. Portions of such codes when t...
Samarjit Chakraborty, Thomas Erlebach, Lothar Thie...