29 search results - page 3 / 6 » A Graph Based Framework to Detect Optimal Memory Layouts for... |
TJS
2002
13 years 5 months ago
2002
A significant source for enhancing application performance and for reducing power consumption in embedded processor applications is to improve the usage of the memory hierarchy. In...
CODES
2000
IEEE
13 years 10 months ago
2000
IEEE
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
ICDM
2006
IEEE
13 years 11 months ago
2006
IEEE
We describe a part-based object-recognition framework, specialized to mining complex 3D objects from detailed 3D images. Objects are modeled as a collection of parts together with...
ASPDAC
2001
ACM
13 years 9 months ago
2001
ACM
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...
IEEEPACT
1999
IEEE
13 years 10 months ago
1999
IEEE
The performance of applications on large shared-memory multiprocessors with coherent caches depends on the interaction between the granularity of data sharing, the size of the coh...