3 search results - page 1 / 1 » A Hardware Accelerator for k-th Nearest Neighbor Thinning |
ERSA
2008
13 years 6 months ago
2008
This paper presents an accelerator for k-th nearest neighbor thinning, a run time intensive algorithmic kernel used in recent multi-objective optimizers. We discuss the thinning al...
FPL
2009
Springer
13 years 9 months ago
2009
Springer
The creation and optimization of FPGA accelerators comprising several compute cores and memories are challenging tasks in high performance reconfigurable computing. In this paper...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
We present an efficient analog synthesis algorithm employing regression models of circuit matrices. Circuit matrix models achieve accurate and speedy synthesis of analog circuits...