103 search results - page 21 / 21 » A Hardware Packet Re-Sequencer Unit for Network Processors |
TC
2008
13 years 5 months ago
2008
One of the most critical resource management issues in the use of ternary content addressable memory (TCAM) for packet classification/filtering is how to effectively support filte...
AINA
2009
IEEE
14 years 8 days ago
2009
IEEE
The architectures which support modern supercomputing machinery are as diverse today, as at any point during the last twenty years. The variety of processor core arrangements, thr...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of...