16 search results - page 1 / 4 » A Hierarchical Test Scheme for System-On-Chip Designs |
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
System-on-chip (SOC) design methodology is becoming the trend in the IC industry. Integrating reusable cores from multiple sources is essential in SOC design, and different design...
ITC
1997
IEEE
13 years 9 months ago
1997
IEEE
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
QSIC
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper proposes a stochastic voting for testing a large number of Web Services (WS) under group testing. In the future, a large number of WS will be available and they need to...
MMSEC
2006
ACM
13 years 10 months ago
2006
ACM
In this paper, we introduce to the special domain of image annotation watermarking, based on embedding of hierarchical data related to objects into user-selected areas on an image...
CVIU
2008
13 years 4 months ago
2008
We propose a novel scheme for using supervised learning for function-based classification of objects in 3D images. During the learning process, a generic multi-level hierarchical ...