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» A Logic-enhanced Memory for Digital Data Recovery Circuits
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ISQED
2003
IEEE
113views Hardware» more  ISQED 2003»
13 years 10 months ago
Using Integer Equations for High Level Formal Verification Property Checking
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Bijan Alizadeh, Mohammad Reza Kakoee
SIGMOD
2007
ACM
224views Database» more  SIGMOD 2007»
14 years 5 months ago
Design of flash-based DBMS: an in-page logging approach
The popularity of high-density flash memory as data storage media has increased steadily for a wide spectrum of computing devices such as PDA's, MP3 players, mobile phones an...
Sang-Won Lee, Bongki Moon
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
13 years 3 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
MICRO
2009
IEEE
148views Hardware» more  MICRO 2009»
13 years 12 months ago
Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
Sangyeun Cho, Hyunjin Lee
DSN
2003
IEEE
13 years 10 months ago
On the Design of Robust Integrators for Fail-Bounded Control Systems
This paper describes the design and evaluation of a robust integrator for software-implemented control systems. The integrator is constructed as a generic component in the Simulin...
Jonny Vinter, Andréas Johansson, Peter Folk...