12 search results - page 2 / 3 » A Low Overhead Fault Tolerant Coherence Protocol for CMP Arc... |
ISCA
2006
IEEE
13 years 11 months ago
2006
IEEE
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
HPCA
2006
IEEE
14 years 5 months ago
2006
IEEE
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
TC
2010
13 years 3 months ago
2010
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
HPCA
2003
IEEE
14 years 5 months ago
2003
IEEE
A challenging issue in today's server systems is to transparently deal with failures and application-imposed requirements for continuous operation. In this paper we address t...
ISCA
2011
IEEE
12 years 9 months ago
2011
IEEE
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...