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ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
13 years 11 months ago
Hermes-GLP: A GALS Network on Chip Router with Power Control Techniques
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
Julian J. H. Pontes, Matheus T. Moreira, Rafael So...
MAM
2006
126views more  MAM 2006»
13 years 5 months ago
HiDRA - A reactive multiprocessor architecture for heterogeneous embedded systems
Embedded systems are typically heterogeneous requiring interacting hardware and software components, are locally synchronous while being globally asynchronous and combine both con...
Zoran A. Salcic, Dong Hui, Partha S. Roop, Morteza...
ASYNC
2005
IEEE
112views Hardware» more  ASYNC 2005»
13 years 11 months ago
Request-Driven GALS Technique for Wireless Communication System
A Globally Asynchronous - Locally Synchronous (GALS) technique for application in wireless communication systems is proposed and evaluated. The GALS wrappers are based on a reques...
Milos Krstic, Eckhard Grass, Christian Stahl
SAMOS
2007
Springer
13 years 11 months ago
Evaluating Large System-on-Chip on Multi-FPGA Platform
This paper presents a configurable base architecture tailorable for different applications. It allows simple and rapid way to evaluate and prototype large Multi-Processor System-on...
Ari Kulmala, Erno Salminen, Timo D. Hämä...
ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
13 years 9 months ago
Mixed-clock issue queue design for energy aware, high-performance cores
- Globally-Asynchronous, Locally-Synchronous (GALS) design style has started to gain interest recently as a possible solution to the increased design complexity, power and thermal ...
Venkata Syam P. Rapaka, Emil Talpes, Diana Marcule...