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» A Mask Reuse Methodology for Reducing System-on-a-Chip Cost
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ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
13 years 9 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
DAC
2002
ACM
14 years 6 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik
SOSP
2009
ACM
14 years 2 months ago
Automatic device driver synthesis with termite
Faulty device drivers cause significant damage through down time and data loss. The problem can be mitigated by an improved driver development process that guarantees correctness...
Leonid Ryzhyk, Peter Chubb, Ihor Kuz, Etienne Le S...
ICDT
2001
ACM
147views Database» more  ICDT 2001»
13 years 10 months ago
Parallelizing the Data Cube
This paper presents a general methodology for the efficient parallelization of existing data cube construction algorithms. We describe two different partitioning strategies, one f...
Frank K. H. A. Dehne, Todd Eavis, Susanne E. Hambr...