181 search results - page 4 / 37 » A Mechanism for Verifying Data Speculation |
HPCA
2001
IEEE
14 years 6 months ago
2001
IEEE
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
ICS
2003
Tsinghua U.
13 years 11 months ago
2003
Tsinghua U.
Communication latencies within critical sections constitute a major bottleneck in some classes of emerging parallel workloads. In this paper, we argue for the use of Inferentially...
CGO
2004
IEEE
13 years 9 months ago
2004
IEEE
Efficient inter-thread value communication is essential for improving performance in Thread-Level Speculation (TLS). Although several mechanisms for improving value communication ...
APCSAC
2005
IEEE
13 years 11 months ago
2005
IEEE
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
VEE
2012
ACM
12 years 1 months ago
2012
ACM
Checkpoint-recovery based virtual machine (VM) replication is an attractive technique for accommodating VM installations with high-availability. It provides seamless failover for ...