17 search results - page 3 / 4 » A Medium-Grain Reconfigurable Architecture for DSP: VLSI Des... |
FCCM
1999
IEEE
13 years 10 months ago
1999
IEEE
Abstract We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems ACS. Our ...
FCCM
2002
IEEE
13 years 10 months ago
2002
IEEE
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
IPPS
2002
IEEE
13 years 10 months ago
2002
IEEE
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
IEEEPACT
2000
IEEE
13 years 10 months ago
2000
IEEE
As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
DATE
2010
IEEE
13 years 11 months ago
2010
IEEE
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...