Low latency, application, specific multipliers are required for m,any DSP algorithms. Tree multipliers are an obvious answer to this requirement. However, tree architectures have ...
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
Stephen D. Craven, Cameron Patterson, Peter M. Ath...
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
Andreas Hoffmann, Frank Fiedler, Achim Nohl, Suren...
This paper outlines a methodology for designing information systems based on XML. The methodology uses XML DTDs to define the design standards, and the structure and constraints of...
In this paper we propose a generic methodology for the automated generation of fuzzy models. The methodology is realized in three stages. Initially, a crisp model is created and i...
Markos G. Tsipouras, Themis P. Exarchos, Dimitrios...