13 search results - page 2 / 3 » A Min-Cost Flow Based Detailed Router for FPGAs |
SASP
2009
IEEE
13 years 11 months ago
2009
IEEE
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
CCR
2006
13 years 4 months ago
2006
The correct admission of flows in the Differentiated Services (DiffServ) environment is critical to provide stable and predictable quality of service (QoS) to the end user. Withou...
JHSN
2000
13 years 4 months ago
2000
Fair allocation of available bandwidth to competing flows is a simple form of quality of service (QoS) that can be provided to customers in packet-switched networks. A number of p...
FPL
2005
Springer
13 years 10 months ago
2005
Springer
With the onset of Gigabit networks, current generation networking components will soon be insufficient for numerous reasons: most notably because existing methods cannot support h...
FCCM
2008
IEEE
13 years 11 months ago
2008
IEEE
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...