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» A Min-Cost Flow Based Detailed Router for FPGAs
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GLVLSI
2009
IEEE
131views VLSI» more  GLVLSI 2009»
13 years 11 months ago
Octilinear redistributive routing in bump arrays
This paper proposes a scheme for automatic re-distribution layer (RDL) routing, which is used in chip-package connections. Traditional RDL routing designs are mostly performed man...
Renshen Wang, Chung-Kuan Cheng
FPGA
2000
ACM
161views FPGA» more  FPGA 2000»
13 years 8 months ago
The effect of LUT and cluster size on deep-submicron FPGA performance and density
In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
Elias Ahmed, Jonathan Rose
PERCOM
2004
ACM
14 years 4 months ago
Performance Issues with Vertical Handovers - Experiences from GPRS Cellular and WLAN Hot-spots Integration
Interworking heterogeneous wireless access technologies is an important step towards building the next generation, all-IP wireless access infrastructure. In this paper, we present...
Rajiv Chakravorty, Pablo Vidales, Kavitha Subraman...