36 search results - page 2 / 8 » A Near Optimal Algorithm for Technology Mapping Minimizing A... |
DAC
2006
ACM
14 years 6 months ago
2006
ACM
The gain-based technology mapping paradigm has been successfully employed for finding minimum delay and minimum area mappings. However, existing gain-based technology mappers fail...
FPGA
2001
ACM
13 years 10 months ago
2001
ACM
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
ICCAD
1999
IEEE
13 years 9 months ago
1999
IEEE
We present LEOPARD, a fanout optimization algorithm based on the effort delay model for near-continuous size buffer libraries. Our algorithm minimizes area under required timing a...
ICCAD
1997
IEEE
13 years 9 months ago
1997
IEEE
In this paper, we present an optimal algorithm for solving the simultaneous technology mapping and linear placement problem for tree-structured circuits with the objective of mini...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...