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KBSE
2005
IEEE
13 years 10 months ago
Learning to verify branching time properties
We present a new model checking algorithm for verifying computation tree logic (CTL) properties. Our technique is based on using language inference to learn the fixpoints necessar...
Abhay Vardhan, Mahesh Viswanathan
ENTCS
2007
109views more  ENTCS 2007»
13 years 5 months ago
Symbolic Model Checking for Channel-based Component Connectors
The paper reports on the foundations and experimental results with a model checker for component connectors modelled by networks of channels in the calculus Reo. The specificatio...
Sascha Klüppelholz, Christel Baier
KBSE
2009
IEEE
13 years 12 months ago
Cache-Based Model Checking of Networked Applications: From Linear to Branching Time
Abstract—Many applications are concurrent and communicate over a network. The non-determinism in the thread and communication schedules makes it desirable to model check such sys...
Cyrille Artho, Watcharin Leungwattanakit, Masami H...
ICCAD
2009
IEEE
96views Hardware» more  ICCAD 2009»
13 years 3 months ago
PSTA-based branch and bound approach to the silicon speedpath isolation problem
The lack of good "correlation" between pre-silicon simulated delays and measured delays on silicon (silicon data) has spurred efforts on so-called silicon debug. The ide...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
MEMOCODE
2005
IEEE
13 years 10 months ago
Three-valued logic in bounded model checking
In principle, bounded model checking (BMC) leads to semidecision procedures that can be used to verify liveness properties and to falsify safety properties. If the procedures fail...
Tobias Schüle, Klaus Schneider