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VLSID
2006
IEEE
85views VLSI» more  VLSID 2006»
14 years 5 months ago
A Novel Architecture Using the Decorrelating Transform for Low Power Adaptive Filters
This paper presents a novel architecture using the decorrelating (DECOR) transformation technique when applied to an LMS adaptive filter. The DECOR transform has been evaluated pr...
Mark P. Tennant, Ahmet T. Erdogan, Tughrul Arslan,...
VLSID
1997
IEEE
106views VLSI» more  VLSID 1997»
13 years 9 months ago
Low-Power Configurable Processor Array for DLMS Adaptive Filtering
I n this paper, we first present a pipelined delayed least mean square (DLMS) adaptive filter architecture whose power dissipation meets a specified budget. This low-power archite...
S. Ramanathan, V. Visvanathan
VLSISP
2010
148views more  VLSISP 2010»
13 years 3 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...
ISLPED
2000
ACM
111views Hardware» more  ISLPED 2000»
13 years 9 months ago
Low power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels
In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Variou...
Khurram Muhammad, Robert B. Staszewski, Poras T. B...
ICDCSW
2003
IEEE
13 years 10 months ago
Adaptive Power Control and Selective Radio Activation for Low-Power Infrastructure-Mode 802.11 LANs
We present an integrated dual approach to reduce power consumption in infrastructure-mode 802.11 wireless LANs. A novel distributed power control algorithm adaptively adjusts the ...
Anmol Sheth, Richard Han