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ASPLOS
1989
ACM
13 years 9 months ago
Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
Robert Cohn, Thomas R. Gross, Monica S. Lam, P. S....
CCGRID
2005
IEEE
13 years 10 months ago
Mapping DAG-based applications to multiclusters with background workload
Before an application modelled as a Directed Acyclic Graph (DAG) is executed on a heterogeneous system, a DAG mapping policy is often enacted. After mapping, the tasks (in the DAG...
Ligang He, Stephen A. Jarvis, Daniel P. Spooner, D...
HPCA
2009
IEEE
14 years 5 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
ICPADS
2007
IEEE
13 years 11 months ago
A scheduling algorithm for revenue maximisation for cluster-based Internet services
This paper proposes a new priority scheduling algorithm to maximise site revenue of session-based multi-tier Internet services in a multicluster environment. This research is part...
James Wen Jun Xue, Ligang He, Stephen A. Jarvis