2 search results - page 1 / 1 » A Power-Efficient Floating-Point Co-processor Design |
CSSE
2008
IEEE
13 years 6 months ago
2008
IEEE
According to dramatically growing interesting in power-efficient embedded processor, designers must establish the proper power strategy when they design new embedded processor core...
ASAP
2007
IEEE
13 years 6 months ago
2007
IEEE
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...