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MICRO
2006
IEEE
127views Hardware» more  MICRO 2006»
13 years 11 months ago
A Predictive Performance Model for Superscalar Processors
Designing and optimizing high performance microprocessors is an increasingly difficult task due to the size and complexity of the processor design space, high cost of detailed si...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
ISPASS
2009
IEEE
13 years 12 months ago
Accurately approximating superscalar processor performance from traces
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
Kiyeon Lee, Shayne Evans, Sangyeun Cho
CF
2010
ACM
13 years 10 months ago
Interval-based models for run-time DVFS orchestration in superscalar processors
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
Georgios Keramidas, Vasileios Spiliopoulos, Stefan...
ICCD
1996
IEEE
145views Hardware» more  ICCD 1996»
13 years 9 months ago
Can Trace-Driven Simulators Accurately Predict Superscalar Performance?
There are four crucial issues associated with performance simulators: simulator retargetability, simulator validation, simulation speed and simulation accuracy. This paper documen...
Bryan Black, Andrew S. Huang, Mikko H. Lipasti, Jo...
HPCA
1999
IEEE
13 years 9 months ago
A Study of Control Independence in Superscalar Processors
Control independence has been put forward as a significant new source of instruction-level parallelism for future generation processors. However, its performance potential under p...
Eric Rotenberg, Quinn Jacobson, James E. Smith