Abstract—We study a network model in which each network link is associated with a set of delays and costs. These costs are a function of the delays and reflect the prices paid i...
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...
We consider the problem of traffic grooming in WDM path, star, and tree networks. Traffic grooming is a variant of the well-known logical topology design, and is concerned with the...
Sensor networks, with their ad hoc deployments, node mobility, and wireless communication, pose serious challenges for developing provably correct and efficient applications. A po...
Bernadette Charron-Bost, Jennifer L. Welch, Josef ...
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...