11 search results - page 2 / 3 » A Quantitative Analysis of Loop Nest Locality |
ICPP
1999
IEEE
13 years 9 months ago
1999
IEEE
Most of today's multiprocessors have a DistributedShared Memory (DSM) organization, which enables scalability while retaining the convenience of the shared-memory programming...
PCI
2005
Springer
13 years 10 months ago
2005
Springer
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
VLSISP
2008
13 years 3 months ago
2008
Data access usually leads to more than 50% of the power cost in a modern signal processing system. To realize a low-power design, how to reduce the memory access power is a critica...
CC
2006
Springer
13 years 8 months ago
2006
Springer
The polyhedral model is known to be a powerful framework to reason about high level loop transformations. Recent developments in optimizing compilers broke some generally accepted ...
CORR
2007
Springer
13 years 4 months ago
2007
Springer
Recently there has been a growing interest of research in tabling in the logic programming community because of its usefulness in a variety of application domains including progra...