Sciweavers

149 search results - page 29 / 30
» A Real-Time Streaming Memory Controller
Sort
View
CGO
2006
IEEE
13 years 11 months ago
Constructing Virtual Architectures on a Tiled Processor
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
David Wentzlaff, Anant Agarwal
JMLR
2002
133views more  JMLR 2002»
13 years 5 months ago
Learning Precise Timing with LSTM Recurrent Networks
The temporal distance between events conveys information essential for numerous sequential tasks such as motor control and rhythm detection. While Hidden Markov Models tend to ign...
Felix A. Gers, Nicol N. Schraudolph, Jürgen S...
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
13 years 3 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
MEMOCODE
2010
IEEE
13 years 3 months ago
A regular expression matching using non-deterministic finite automaton
Abstract--This paper shows an implementation of CANSCID (Combined Architecture for Stream Categorization and Intrusion Detection). To satisfy the required system throughput, the pa...
Hiroshi Nakahara, Tsutomu Sasao, Munehiro Matsuura
IPPS
2008
IEEE
14 years 4 days ago
A Hybrid MPI design using SCTP and iWARP
Abstract— Remote Direct Memory Access (RDMA) and pointto-point network fabrics both have their own advantages. MPI middleware implementations typically use one or the other, howe...
Mike Tsai, Brad Penoff, Alan Wagner