Sciweavers

43 search results - page 1 / 9
» A Reconfigurable Generic Dual-Core Architecture
Sort
View
DSN
2006
IEEE
13 years 11 months ago
A Reconfigurable Generic Dual-Core Architecture
Thomas Kottke, Andreas Steininger
CAI
2004
Springer
13 years 5 months ago
A Generic Dual Core Architecture with Error Containment
The dual core strategy allows to construct a fail-silent processor from two instances (master/checker) of any arbitrary standard processor. Its main drawbacks are its vulnerability...
Thomas Kottke, Andreas Steininger
FCCM
2009
IEEE
170views VLSI» more  FCCM 2009»
13 years 3 months ago
Generic Software Framework for Adaptive Applications on FPGAs
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining...
Suhaib A. Fahmy, Jorg Lotze, Juanjo Noguera, Linda...
ERSA
2009
107views Hardware» more  ERSA 2009»
13 years 3 months ago
Towards Effective Modeling and Programming Multi-core Tiled Reconfigurable Architectures
For a generic flexible efficient array antenna receiver platform a hierarchical reconfigurable tiled architecture has been proposed. The architecture provides a flexible reconfigur...
Kenneth C. Rovers, Marcel D. van de Burgwal, Jan K...
ISCAS
2005
IEEE
125views Hardware» more  ISCAS 2005»
13 years 10 months ago
A methodology for partitioning DSP applications in hybrid reconfigurable systems
—In this paper, we describe an automated and formalized methodology for partitioning computational intensive applications between reconfigurable hardware blocks of different gran...
Michalis D. Galanis, Athanasios Milidonis, George ...