6 search results - page 1 / 2 » A Retargetable Compiler of VLIW ASIP for Media Signal Proces... |
CSREAESA
2006
13 years 6 months ago
2006
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
The increasing usage of Application Specific Instruction Set Processors (ASIPs) in audio and video telecommunications has made strong demands on the rapid availability of dedicat...
FPL
2006
Springer
13 years 8 months ago
2006
Springer
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
CODES
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...