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» A Self-Reconfigurable Gate Array Architecture

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FPL
2000
Springer

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A Self-Reconfigurable Gate Array Architecture

13 years 8 months ago

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Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...

Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro M...

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IPPS
2002
IEEE

124views Distributed And Parallel Com...» more IPPS 2002»

On the Communication Capability of the Self-Reconfigurable Gate Array Architecture

13 years 9 months ago

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Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, J...

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ERSA
2010

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A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics

13 years 2 months ago

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Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...

Heiner Giefers, Marco Platzner

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DAC
1991
ACM

99views Computer Architecture» more DAC 1991»

Technology Mapping for Electrically Programmable Gate Arrays

13 years 8 months ago