245 search results - page 1 / 49 » A Software Transactional Memory System for an Asymmetric Pro... |
SBACPAD
2008
IEEE
13 years 11 months ago
2008
IEEE
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
DATE
2007
IEEE
13 years 10 months ago
2007
IEEE
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
POPL
2007
ACM
14 years 4 months ago
2007
ACM
Constraint Handling Rules (CHR) is a concurrent committedchoice constraint logic programming language to describe transformations (rewritings) among multi-sets of constraints (ato...
CGO
2009
IEEE
13 years 11 months ago
2009
IEEE
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
PPOPP
2009
ACM
14 years 5 months ago
2009
ACM
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...