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ICCD
2002
IEEE
107views Hardware» more  ICCD 2002»
14 years 1 months ago
A Standard-Cell Placement Tool for Designs with High Row Utilization
Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh
ICCD
2006
IEEE
77views Hardware» more  ICCD 2006»
14 years 1 months ago
Iterative-Constructive Standard Cell Placer for High Speed and Low Power
Abstract— Timing and low power emerge as the most important goals in contemporary design. Meanwhile, the majority of placement algorithms developed by industry and academia still...
Sungjae Kim, Eugene Shragowitz
GLVLSI
2007
IEEE
134views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Sleep transistor distribution in row-based MTCMOS designs
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
Chanseok Hwang, Peng Rong, Massoud Pedram
ICCAD
2009
IEEE
109views Hardware» more  ICCAD 2009»
13 years 2 months ago
CRISP: Congestion reduction by iterated spreading during placement
Dramatic progress has been made in algorithms for placement and routing over the last 5 years, with improvements in both speed and quality. Combining placement and routing into a ...
Jarrod A. Roy, Natarajan Viswanathan, Gi-Joon Nam,...
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
12 years 8 months ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...