57 search results - page 11 / 12 » A Statistical Approach to the Timing-Yield Optimization of P... |
TCAD
2008
13 years 5 months ago
2008
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
ICCD
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
SIGMOD
1999
ACM
13 years 9 months ago
1999
ACM
Query processing in data integration occurs over network-bound, autonomous data sources. This requires extensions to traditional optimization and execution techniques for three re...
DAC
2002
ACM
14 years 6 months ago
2002
ACM
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Smart cards are vulnerable to both invasive and non-invasive attacks. Specifically, non-invasive attacks using power and timing measurements to extract the cryptographic key has d...