We present a feasibility study of a power-reduction scheme that reduces the thermal power of processors by lowering frequency and voltage in the context of high-performance comput...
Energy efficiency and power capping remain growing concerns in server systems. Online applications continue to evolve with new features and dynamic clientdirected processing, res...
Kai Shen, Arrvindh Shriraman, Sandhya Dwarkadas, X...
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Memory-processor integration o ers new opportunities for reducing the energy of a system. In the case of embedded systems, one solution consists of mapping the most frequently acc...
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...