32 search results - page 1 / 7 » A Study of the Performance Potential for Dynamic Instruction... |
APCSAC
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract. Instruction hints have become an important way to communicate compile-time information to the hardware. They can be generated by the compiler and the post-link optimizer ...
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
JOCN
2010
13 years 3 months ago
2010
■ Selective attention confers a behavioral benefit on both perceptual and working memory (WM) performance, often attributed to top–down modulation of sensory neural processing...
MICRO
1992
IEEE
13 years 8 months ago
1992
IEEE
An important design decision in the implementation of a superscalar processor is the amount of hardware to allocate to the instruction scheduling mechanism. Dynamic scheduling pro...
ISCA
1997
IEEE
13 years 9 months ago
1997
IEEE
Superscalar processors currently have the potential to fetch multiple basic blocks per cycle by employing one of several recently proposed instruction fetch mechanisms. However, t...