Sciweavers

3871 search results - page 3 / 775
» A System Architecture for Distributed Control Loop Applicati...
Sort
View
IPPS
2010
IEEE
13 years 3 months ago
Restructuring parallel loops to curb false sharing on multicore architectures
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...
Santosh Sarangkar, Apan Qasem
GLVLSI
2010
IEEE
149views VLSI» more  GLVLSI 2010»
13 years 7 months ago
Lightweight runtime control flow analysis for adaptive loop caching
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
Marisha Rawlins, Ann Gordon-Ross
ISSAC
2007
Springer
132views Mathematics» more  ISSAC 2007»
13 years 12 months ago
Adaptive loops with kaapi on multicore and grid: applications in symmetric cryptography
The parallelization of two applications in symmetric cryptography is considered: block ciphering and a new method based on random sampling for the selection of basic substitution ...
Vincent Danjean, Roland Gillard, Serge Guelton, Je...
TII
2010
146views Education» more  TII 2010»
13 years 14 days ago
PAUC: Power-Aware Utilization Control in Distributed Real-Time Systems
Abstract--CPU utilization control has recently been demonstrated to be an effective way of meeting end-to-end deadlines for distributed real-time systems running in unpredictable e...
Xiaorui Wang, Xing Fu, Xue Liu, Zonghua Gu
ICAS
2008
IEEE
200views Robotics» more  ICAS 2008»
14 years 6 days ago
Connectivity of Thetis, a Distributed Hybrid Simulator, with a Mixed Control Architecture
—The purpose of this paper is to present the linkage of Thetis (a real time multi-vehicles hybrid simulator for heterogeneous vehicles) with a control architecture for the manage...
Olivier Parodi, Abdellah El Jalaoui, David Andreu