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DATE
2006
IEEE
95views Hardware» more  DATE 2006»
13 years 9 months ago
Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications
Network applications are becoming increasingly popular in the embedded systems domain requiring high performance, which leads to high energy consumption. In networks is observed t...
Alexandros Bartzas, Stylianos Mamagkakis, Georgios...
CODES
2008
IEEE
14 years 15 days ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
LCTRTS
2007
Springer
14 years 5 days ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 6 days ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
CODES
2005
IEEE
13 years 11 months ago
Comparing the size of .NET applications with native code
Byte-code based languages are slowly becoming adopted in embedded domains because of improved security and portability. Another potential reason for their adoption is the reputati...
Roberto Costa, Erven Rohou