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IEEEINTERACT
2003
IEEE
13 years 11 months ago
High Performance Code Generation through Lazy Activation Records
For call intensive programs, function calls are major bottlenecks during program execution since they usually force register contents to be spilled into memory. Such register to m...
Manoranjan Satpathy, Rabi N. Mahapatra, Siddharth ...
LCTRTS
2010
Springer
13 years 7 months ago
An efficient code update scheme for DSP applications in mobile embedded systems
DSP processors usually provide dedicated address generation units (AGUs) to assist address computation. By carefully allocating variables in the memory, DSP compilers take advanta...
Weijia Li, Youtao Zhang
DAC
2009
ACM
13 years 10 months ago
Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
José Baiocchi, Bruce R. Childers
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
13 years 3 months ago
Memory organization and data layout for instruction set extensions with architecturally visible storage
Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional un...
Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leb...
FMSD
2007
133views more  FMSD 2007»
13 years 5 months ago
Static priority scheduling of event-triggered real-time embedded systems
Real-time embedded systems are often specified as a collection of independent tasks, each generating a sequence of event-triggered code blocks, and the scheduling in this domain ...
Cagkan Erbas, Andy D. Pimentel, Selin Cerav-Erbas