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ASPDAC
2005
ACM
101views Hardware» more  ASPDAC 2005»
13 years 6 months ago
A clustering technique to optimize hardware/software synchronization
— In this paper we present a scheme for reducing the amount of synchronization overhead needed between components, after HW/SW partitioning, to preserve the original control flo...
Junyu Peng, Samar Abdi, Daniel Gajski
ASAP
1997
IEEE
92views Hardware» more  ASAP 1997»
13 years 8 months ago
Optimized software synthesis for synchronous dataflow
This paper reviews a set of techniques for compiling dataflow-based, graphical programs for embedded signal processing applications into efficient implementations on programmable ...
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward...
IFM
2004
Springer
13 years 10 months ago
An Optimal Approach to Hardware/Software Partitioning for Synchronous Model
Geguang Pu, Dang Van Hung, Jifeng He, Wang Yi
CODES
2005
IEEE
13 years 10 months ago
Shift buffering technique for automatic code synthesis from synchronous dataflow graphs
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
Hyunok Oh, Nikil D. Dutt, Soonhoi Ha
DATE
2006
IEEE
66views Hardware» more  DATE 2006»
13 years 11 months ago
Power/performance hardware optimization for synchronization intensive applications in MPSoCs
This paper explores optimization techniques of the synchronization mechanisms for MPSoCs based on complex interconnect (Network-on-Chip), targeted at future powerefficient system...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...