18 search results - page 4 / 4 » A compiler optimization to reduce soft errors in register fi... |
CGO
2009
IEEE
13 years 11 months ago
2009
IEEE
—As semiconductor technology scales into the deep submicron regime the occurrence of transient or soft errors will increase. This will require new approaches to error detection. ...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
The Architectural Vulnerability Factor (AVF) of a hardware structure is the probability that a fault in the structure will affect the output of a program. AVF captures both microa...