Sciweavers

20 search results - page 4 / 4
» A compressed memory hierarchy using an indirect index cache
Sort
View
PLDI
2010
ACM
13 years 11 months ago
Z-rays: divide arrays and conquer speed and flexibility
Arrays are the ubiquitous organization for indexed data. Throughout programming language evolution, implementations have laid out arrays contiguously in memory. This layout is pro...
Jennifer B. Sartor, Stephen M. Blackburn, Daniel F...
CASES
2006
ACM
14 years 1 days ago
Adaptive and flexible dictionary code compression for embedded applications
Dictionary code compression is a technique where long instructions in the memory are replaced with shorter code words used as index in a table to look up the original instructions...
Mats Brorsson, Mikael Collin
PLDI
2005
ACM
13 years 11 months ago
Automatic pool allocation: improving performance by controlling data structure layout in the heap
This paper describes Automatic Pool Allocation, a transformation framework that segregates distinct instances of heap-based data structures into seperate memory pools and allows h...
Chris Lattner, Vikram S. Adve
CF
2010
ACM
13 years 11 months ago
EXACT: explicit dynamic-branch prediction with active updates
Branches that depend directly or indirectly on load instructions are a leading cause of mispredictions by state-of-the-art branch predictors. For a branch of this type, there is a...
Muawya Al-Otoom, Elliott Forbes, Eric Rotenberg
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
13 years 11 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna