This paper presents the design and the performance evaluation of a coarse-grain dynamically reconfigurable platform for network applications. The platform consists of two MicroBla...
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
Domingo Benitez, Juan C. Moure, Dolores Rexachs, E...
s the Pus using the OpenCL API as the platform independent programming model. It has the proposal to extend OpenCL with a module that schedule and balance the workload over the CPU...
Reconfigurable hardware devices are envisioned as the proper platform to implement multimedia applications, providing both real time performance and dynamic adaptability for the a...