Abstract— Noise induced by impedance discontinuities from VLSI packaging is one of the leading challenges facing system level designers in the next decade. The performance of IC ...
The test signal method can be used to measure and model inductance parameters (self and mutual) of a very small interconnect especially in highdensity IC’s by using a test signa...
As the operation frequency reaches gigahertz in very deep-submicron designs, the effect of on-chip inductance on circuit performance can no longer be neglected. Therefore, it is d...
Skin effect makes interconnect resistance and inductance frequency dependent. This paper addresses the problem of efficiently estimating the signal characteristics of any RLC netw...
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...