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TPHOL
1998
IEEE
13 years 8 months ago
1998
IEEE
Abstraction in a Higher-Order Logic Framework Marco Benini Sara Kalvala Dirk Nowotka Department of Computer Science University of Warwick, Coventry, CV4 7AL, United Kingdom We pres...
ATVA
2009
Springer
13 years 8 months ago
2009
Springer
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
ASIAN
2009
Springer
13 years 5 months ago
2009
Springer
Abstract. This paper provides a Hoare-style logic for quantum computation. While the usual Hoare logic helps us to verify classical deterministic programs, our logic supports quant...
FASE
2000
Springer
13 years 8 months ago
2000
Springer
We present a family of tools for program development and verification, comprising the transformation system TAS and the theorem proving interface IsaWin. Both are based on the theo...
FMCAD
2000
Springer
13 years 8 months ago
2000
Springer
Abstract. We present a formal verification methodology for datapathdominated hardware. This provides a systematic but flexible framework within which to organize the activities und...